In this paper we develop and implement sequential nonlinear-programming methods for solving the thermal-aware soft-macro VLSI floorplanning problem with IO-block placement and a dynamic floorplan-boundary. We develop a multi-stage nonlinear-programming approach to this floorplanning problem. We break the floorplanning process into two main stages, a simplified first-stage, which omits any consideration of the floorplan boundary and IO-block placement avoiding introducing adverse bias due to premature consideration of these elements, and a detailed second-stage, which uses information extracted from the first-stage to minimize or eliminate adverse bias when incorporating the floorplan boundary and IO-blocks back into the floorplanning process. Further, we develop methods, universal to all axis-aligned rectangle packing problems, for providing and maintaining macro-block mobility throughout the optimization process allowing our analytical floorplanner to consistently generate high quality floorplans. Finally, we develop a method for making floorplanning thermally aware by modeling each macro-block’s thermal-signature as an additional, curvilinear, macro-block boundary from which we can derive and enforce an additional set of nonoverlap constraints between those boundaries.